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“Politehnica” University of Timisoara

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We focus on topics related to quantum computation and quantum information, such as:

Quantum algorithm design
Quantum circuit design
Simulation of quantum circuits
Fault-tolerance assessment of quantum circuits

Our primary objective is to find common ground for both quantum circuit design and classical computer hardware design. Therefore, we will use a computer hardware engineering approach for quantum computation. However this attempt is facing an important hurdle: the hardness of simulating quantum processess; thus involving Computer Aided Design and Design Automation techniques in quantum circuit design and optimization is difficult.

The first step of our approach was to define a Hardware Description Language (HDL) based methodology for simulating quantum circuits. Due to HDLs capability of describing the same circuit with both structural and behavioral architectures (in a compact manner), the source of simulation complexity - quantum entanglement - is isolated. But this procedure would be inefficient, unless we employ a quantum state compression that avoids the entangled representation. We have designed a special representation technique, called "bubble bit", in order create incentive for structural description and simulation, which are suitable for the HDL-based simulation methodology.

Currently, we are developing an extension of our simulation method, in order to allow for error injection. Besides the fact that fault tolerance is a vital aspect of quantum computation, this project is endorsed by what John Preskill is saying: "once our hardware meets a specified standard of accuracy, quantum error-correcting codes and fault-tolerant procedures enable us to perform arbitrary long quantum computations with arbitrary high reliability" (Fault Tolerant Quantum Computation, quant-ph/9712048). We are designing a tool (QUantum ERror Injection Simulation Tool or QUERIST), aiming at accuracy factor assessment by simulated error injection. Such achievements already exist for classical harware circuits (The MEFISTO project).

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